61be9f373af7c750ca81283c0566b879b7965319
[scilab.git] / scilab / modules / scicos / tests / unit_tests / scicos.dia.ref
1 //<-- CLI SHELL MODE -->
2 // =============================================================================
3 // Scilab ( http://www.scilab.org/ ) - This file is part of Scilab
4 // Copyright (C) ????-2008 - INRIA
5 //
6 //  This file is distributed under the same license as the Scilab package.
7 // =============================================================================
8 if exists("scicos_scicoslib") == 0 then
9     load("SCI/modules/scicos/macros/scicos_scicos/lib");
10 end
11 if exists("scicos_utilslib") == 0 then
12     load("SCI/modules/scicos/macros/scicos_utils/lib");
13 end
14 if or(~isdef(["modelica_libs" "scicos_pal_libs"])) then
15     [modelica_libs, scicos_pal_libs, %scicos_with_grid, %scs_wgrid] = initial_scicos_tables()
16 end
17  %scs_wgrid  = 
18    10.
19    10.
20    12.
21  %scicos_with_grid  = 
22   F
23  scicos_pal_libs  = 
24          column 1 to 8
25 !Branching  Events  Misc  Sinks  Threshold  Linear  MatrixOp  NonLinear  !
26          column 9 to 13
27 !Sources  Electrical  Hydraulics  PDE  IntegerOp  !
28  modelica_libs  = 
29          column 1
30 !SCI/modules/scicos_blocks/macros/Electrical  !
31          column 2
32 !SCI/modules/scicos_blocks/macros/Hydraulics  !
33 exec(loadpallibs,-1)
34 exec("SCI/modules/scicos/tests/unit_tests/scicos_tests.sci");
35 options = default_options();
36 //build the block set
37 blockslib = "scs" + ["Branching" "Events" "Misc" "Sinks" "Threshold" "Linear" ...
38 "NonLinear" "Sources" "Electrical" "Hydraulics"] + "lib";
39 Blocs = [];
40 for blocklib=blockslib
41     B = string(blocklib);
42     Blocs = [Blocs; B(2:$)];
43 end
44 Blocs(Blocs=="m_sin") = [];
45 nb = size(Blocs, 1);
46 assert_checkfalse(checkdefine());
47 assert_checkfalse(checkinputs());
48 assert_checkfalse(checkoutputs());
49 assert_checkfalse(checkorigin());
50 assert_checkfalse(checkdeput());
51 assert_checkfalse(checkfiring());
52 assert_checkfalse(check_define_ports());
53 assert_checkfalse(check_set_ports());