Xcos: fixing diagram compilation 77/12177/5
Paul BIGNIER [Mon, 29 Jul 2013 14:16:59 +0000 (16:16 +0200)]
Fix for diagrams with heterogeneous input types.

For each block, 'in' and 'out' usually are column vectors,
and the comparison was made linewise.

Change-Id: Ia170fd0c7323bc4b87c9f749d3bb0130ffb0f62c

scilab/modules/scicos/macros/scicos_scicos/c_pass2.sci
scilab/modules/xcos/tests/unit_tests/Integer/switch2_m.dia.ref [new file with mode: 0644]
scilab/modules/xcos/tests/unit_tests/Integer/switch2_m.tst [new file with mode: 0644]
scilab/modules/xcos/tests/unit_tests/Integer/switch2_m.zcos [new file with mode: 0644]

index 27ded82..4d0f3d4 100644 (file)
@@ -2479,11 +2479,11 @@ endfunction
 function [ok,bllst]=adjust_typ(bllst,connectmat)
 
     for i=1:length(bllst)
-        if size(bllst(i).in,1)<>size(bllst(i).intyp,2) then
-            bllst(i).intyp=bllst(i).intyp(1)*ones(size(bllst(i).in,1),1);
+        if size(bllst(i).in,"*")<>size(bllst(i).intyp,"*") then
+            bllst(i).intyp=bllst(i).intyp(1)*ones(bllst(i).in);
         end
-        if size(bllst(i).out,1)<>size(bllst(i).outtyp,2) then
-            bllst(i).outtyp=bllst(i).outtyp(1)*ones(size(bllst(i).out,1),1);
+        if size(bllst(i).out,"*")<>size(bllst(i).outtyp,"*") then
+            bllst(i).outtyp=bllst(i).outtyp(1)*ones(bllst(i).out);
         end
     end
     nlnk=size(connectmat,1)
diff --git a/scilab/modules/xcos/tests/unit_tests/Integer/switch2_m.dia.ref b/scilab/modules/xcos/tests/unit_tests/Integer/switch2_m.dia.ref
new file mode 100644 (file)
index 0000000..fddd1ad
--- /dev/null
@@ -0,0 +1,33 @@
+// =============================================================================
+// Scilab ( http://www.scilab.org/ ) - This file is part of Scilab
+// Copyright (C) 2013 - Scilab Enterprises - Paul Bignier
+//
+//  This file is distributed under the same license as the Scilab package.
+// =============================================================================
+// <-- ENGLISH IMPOSED -->
+// <-- XCOS TEST -->
+// Import diagram
+assert_checktrue(importXcosDiagram("SCI/modules/xcos/tests/unit_tests/Integer/switch2_m.zcos"));
+// In the diagram, SWITCH2_m block is given int32, double and int32 as input types (3, 1 and 3).
+// This test ensures that a block can have heterogeneous input types.
+Five  = 5*ones(29, 1);
+A_ref = int32([-Five; Five; 5; 5; -Five; -5; -5; -5; 5; 5; 5; 5; 5]);
+try scicos_simulate(scs_m); catch disp(lasterror()); end
+assert_checkequal(A.values, A_ref);
+try xcos_simulate(scs_m, 4); catch disp(lasterror()); end
+assert_checkequal(A.values, A_ref);
+// Now, try with int16 inputs. select_mode = 1 does not produce any change in this case.
+scs_m.props.context = ["a=int16(-5)"; "b=int16(5)"; "input_type=4"; "select_mode=1"; "buffsize=97"];
+A_ref = int16(A_ref);
+try scicos_simulate(scs_m); catch disp(lasterror()); end
+assert_checkequal(A.values, A_ref);
+try xcos_simulate(scs_m, 4); catch disp(lasterror()); end
+assert_checkequal(A.values, A_ref);
+// Finally, with int8 inputs, and select_mode = 2, we set buffsize to 100 to catch the first zero of the sine function.
+// After that first zero, the sine will not be exactly zero at the testing points anymore.
+scs_m.props.context = ["a=int8(-5)"; "b=int8(5)"; "input_type=5"; "select_mode=2"; "buffsize=100"];
+A_ref = int8([5; -5*ones(99, 1)]);
+try scicos_simulate(scs_m); catch disp(lasterror()); end
+assert_checkequal(A.values, A_ref);
+try xcos_simulate(scs_m, 4); catch disp(lasterror()); end
+assert_checkequal(A.values, A_ref);
diff --git a/scilab/modules/xcos/tests/unit_tests/Integer/switch2_m.tst b/scilab/modules/xcos/tests/unit_tests/Integer/switch2_m.tst
new file mode 100644 (file)
index 0000000..c1cc006
--- /dev/null
@@ -0,0 +1,44 @@
+// =============================================================================
+// Scilab ( http://www.scilab.org/ ) - This file is part of Scilab
+// Copyright (C) 2013 - Scilab Enterprises - Paul Bignier
+//
+//  This file is distributed under the same license as the Scilab package.
+// =============================================================================
+
+// <-- ENGLISH IMPOSED -->
+// <-- XCOS TEST -->
+
+// Import diagram
+assert_checktrue(importXcosDiagram("SCI/modules/xcos/tests/unit_tests/Integer/switch2_m.zcos"));
+
+
+// In the diagram, SWITCH2_m block is given int32, double and int32 as input types (3, 1 and 3).
+// This test ensures that a block can have heterogeneous input types.
+Five  = 5*ones(29, 1);
+A_ref = int32([-Five; Five; 5; 5; -Five; -5; -5; -5; 5; 5; 5; 5; 5]);
+
+try scicos_simulate(scs_m); catch disp(lasterror()); end
+assert_checkequal(A.values, A_ref);
+try xcos_simulate(scs_m, 4); catch disp(lasterror()); end
+assert_checkequal(A.values, A_ref);
+
+
+// Now, try with int16 inputs. select_mode = 1 does not produce any change in this case.
+scs_m.props.context = ["a=int16(-5)"; "b=int16(5)"; "input_type=4"; "select_mode=1"; "buffsize=97"];
+A_ref = int16(A_ref);
+
+try scicos_simulate(scs_m); catch disp(lasterror()); end
+assert_checkequal(A.values, A_ref);
+try xcos_simulate(scs_m, 4); catch disp(lasterror()); end
+assert_checkequal(A.values, A_ref);
+
+
+// Finally, with int8 inputs, and select_mode = 2, we set buffsize to 100 to catch the first zero of the sine function.
+// After that first zero, the sine will not be exactly zero at the testing points anymore.
+scs_m.props.context = ["a=int8(-5)"; "b=int8(5)"; "input_type=5"; "select_mode=2"; "buffsize=100"];
+A_ref = int8([5; -5*ones(99, 1)]);
+
+try scicos_simulate(scs_m); catch disp(lasterror()); end
+assert_checkequal(A.values, A_ref);
+try xcos_simulate(scs_m, 4); catch disp(lasterror()); end
+assert_checkequal(A.values, A_ref);
diff --git a/scilab/modules/xcos/tests/unit_tests/Integer/switch2_m.zcos b/scilab/modules/xcos/tests/unit_tests/Integer/switch2_m.zcos
new file mode 100644 (file)
index 0000000..c5d6da2
Binary files /dev/null and b/scilab/modules/xcos/tests/unit_tests/Integer/switch2_m.zcos differ